1. Field of the Invention
The present invention relates to a latch circuit. More particularly, it relates to a latch circuit having two hold loops to improve the noise tolerance thereof.
2. Description of the Related Art
A variety of latch circuits, such as a delay (D) type flip-flop (FF) or a set-reset (R-S) type FF, are extensively known. These latch circuits have hold loops to feedback either a normal output Q or an inverted output Q, and to hold the status latched therein. However, each latch circuit has only a single hold loop. Consequently, this type of the latch circuit malfunctions easily due to instantaneous electrical noises, such as the noise due to alpha-ray exposure. This will be described in more detail with reference to specific examples.
To overcome the above disadvantage, many countermeasures have been proposed, but disadvantages such as a low noise tolerance, a complex circuit configuration, etc., still remain.